In CMOS audio mixer circuits, in which many inputs are mixed and amplified using operational amplifiers, the voltage offset of these operational amplifiers, especially when the amplifiers are cascaded in stages, can cause clicks and pops in the audio output when inputs are switched in or switched out, or when the output is muted. Typical small CMOS operational amplifier offsets are on the order of 10 mV which can easily result in 20-40 mV changes at the output when the gain/attenuation or mute is changed and is a disturbing audible click for someone listening.
One prior art method of solving this problem is to design operational amplifiers with very low offset voltages, on the order of 200-500 .mu.V. This results in output noise signals or clicks of less than 2 mV which are inaudible. Methods used to reduce offsets in CMOS operational amplifiers are (1) chopping the input to the amplifiers and thereby chopping the offset and filtering it out, and (2) digital offset calibration at power up. The chopping schemes have the drawback that they can alias high frequency signals coming in. Prior offset calibrations schemes have the drawback that typical implementations take a lot of area due to the large amount of associated calibration logic for each amplifier. On a multi-function integrated circuit chip in which chip area is at a premium, it can be appreciated that a offset calibration circuit and method which is highly dense and, thereby, uses relatively small amounts of chip area is highly desirable.